AMD careers – page 14
1,344 open roles at AMD (Technology) in Austin, San Jose, Santa Clara. Read from its own careers site. Search and filter these.
- DFT Pattern
- Sr. Firmware Engineer
- CPU Architecture and RTL Design Engineer
- RTL Design Engineer – Power Design
- Sr. FAE/Field Application Engineer - Meta
- Advanced Package Thermal Technologist
- Advanced Packaging Technologist (Mechanical Modeling)
- Senior Staff Pre Silicon Verification Engineer
- Lead Design Verification Engineer-Memory Controller
- PD Leadership role
- NPU Compiler Engineer
- Sr Salesforce Service Cloud Developer
- Principal Memory Sub-System Validation Lead
- Director, Corporate and Securities Counsel
- Software Development Engineer (Chip Product Security)
- Sr. Counsel, M&A
- System Design Leader or Architect
- Silicon Design Engineer
- Sr. Corporate Counsel (Data Center Solutions)
- Sr. Manager, Product Management-ROCm AI
- ASIC Front-End Methodology Engineer
- Senior Analyst - APM & IT Service Management
- GPU Performance Engineer – AI Kernels
- Sr. Firmware Engineer
- Sr. Firmware Engineer
- Staff/Principal Functional Verification Engineer (Memory Subsystem)
- Load Store Design Engineer
- Summer 2027 PhD Gen AI and Reinforcement Learning Research Intern
- Summer 2027 PhD AI Research Infrastructure, RL Post-Training Intern
- Summer 2027 PhD Technical Program Manager, AI Research Intern
- Software Solutions Engineer
- Staff Product Development Engineer
- Sr. Product Development Engineer
- Sr. Product Development Engineer
- Senior Software Engineer, Memory Diagnostics
- Director, Government Relations (MY/SEA)
- Sensor Platform Engineer
- Staff Compliance and Safety Technical Program Manager
- Sr Director, Datacenter Partner Marketing - OEM, Cloud & ISV
- Principal Enterprise & Database Competitive Performance Engineer
- Principal Competitive CPU Performance Forecaster & Data Scientist
- Principal Competitive CPU Microarchitecture & Platform Performance Engineer
- Next Gen CPU Power Management RTL Design Engineer
- Power Product Development Engineer (Datacenter Platform)
- FPGA/RTL Design Engineering Manager with High-Speed Protocols (HSIO) (PCIE/Ethernet/USB)
- ASIC Design Verification Lead
- Product Application Engineer - Embedded x86
- Senior Functional Verification Engineer (Memory Subsystem)
- Staff Physical Design Engineer
- Manager, Product Engineering