Senior Solution Director
HCLTech · United States
Job Summary
HIGH SPEED – Analog Design Architect - 25 to 28 yrs
UCIe 2.0/3.0 Subject Matter Expert
- Deep expertise in UCIe 2.0/3.0 architecture, die-to-die protocols, PHY, adapter, link initialization, and power-management features.
- Proven experience translating UCIe specifications into implementable analog, digital, package, and verification requirements.
Key Responsibilities
- Strong knowledge of high-speed SerDes, clocking, equalization, channel modeling, signal integrity, interoperability, and compliance.
Skill Requirements
- Ability to guide design, verification, physical implementation, package, firmware, and post-layout teams through specification and closure challenges.