STA methodology engineer

NXP Semiconductors · Bengaluru

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Job Title: STA Methodology Engineer

Team: CTO-DE-FDIP-Logic Libraries
Location: Bengaluru
Experience Level: 10–12 Years
Employment Type: Full-Time

Role Overview:

We are seeking a highly skilled and experienced STA Methodology Engineer to join our CTO-DE-FDIP-Logic Libraries team. In this role, you will be responsible for benchmarking various logic libraries across multiple technology nodes (40nm, 14nm, 10nm, 7nm, 5nm) using synthesis and PNR-based flows on real-world chips and blocks. You will collaborate closely with Timing Methodology and Signoff teams to ensure robust and efficient STA methodologies.

Key Responsibilities:

Required Qualifications:

Preferred Skills:

Soft Skills:


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