Hardware & Silicon jobs in Bengaluru – page 12
637 open hardware & silicon roles in Bengaluru, read straight from employers' own career pages. Search and filter these.
- NoC (RTL) Design-Sr Lead/Staff/Sr Staff
- RTL Design(Peripheral)-Sr Staff
- Functional Verification Engineer
- Software Engineering Technical Leader – Silicon One Software (Timing & Synchronization)
- ASIC Design Verification (DV) Manager
- RTL Design -Director(SOC Lead)
- SoC Design Director
- IP Design Director
- ASIC / Digital Design Director of Engineering
- RTL Design - SrLead/Sr Staff
- ARM Server SoC Software & Firmware Systems Engineer (Sr. Staff / Principal)
- RTL Design Lead/IC Front-End Architect/Datapath Lead
- Soc Design Verification Director
- ASIC Verification Engineer
- ASIC Verification Engineer
- ASIC Design Engineer
- ASIC DV Engineer
- ASIC Senior Manager
- Platform Architect – BIOS/Firmware & Customer Enablement
- ASIC Design Engineer
- ASIC front-end verification engineer
- Senior Principal Verification Engineer
- Senior Execution and Quality Validation Engineer
- Senior Embedded Firmware Engineer
- Principal Cache RTL Design - CPU Team
- CPU Design Verification Engineer
- Senior DDR & Execution Validation Engineer
- Senior Debug Validation Engineer
- Principal Debug Validation Engineer
- Principal Execution & QA Validation Engineer
- Principal Mechanical Engineer
- Power & Performance Validation Engineer
- Senior Power & Performance Validation Engineer
- Staff -Power and Performance Validation Engineer
- ASIC Principal Design Engineer
- Principal Power & Performance Validation Engineer
- Hardware Engineer- (Power electronics/ Analog design) - BLR , 8 to 15 yrs
- ASIC Design Verification Engineer - 5 years to 13Years - Bangalore
- Pre-silicon Validation Engineer - Emulation
- RTL Design (GPU)-Sr Lead
- Senior Zigbee / Thread Firmware Engineer
- Physical Design Engineer
- Lead RF Hardware Design Engineer
- CPU RTL Design - Sr Eng/Lead/Staff/Sr Staff
- Analog Circuit Design Engineer - AI/ML methodology
- Post‑Silicon SoC & System‑Level Validation Engineer
- ASIC Design Verification Engineer | UVM | Exp 8+ Years
- Post Silicon Validation Manager
- Physical Design Manager
- ASIC Engineering Analog Design Leader:ASIC Engineering Analog Design Leader | high-speed optical transceiver circuits (modulator drivers, TIAs, CDRs, PLLs, ADC/DAC) | 10+ years